The present disclosure relates to methods of forming sublithographic patterns, and particularly to methods of sublithographic patterning employing image transfer of a controllably damaged dielectric sidewall, and structures employed to effect the same.
Lithographic capabilities are one of the significant technological limitations that constrain the continued scaling of semiconductor devices. Specifically, lithographic techniques to reliably print dimensions less than 30 nm are not commercially available as of 2010. While electron beam lithography has been proposed as a potential solution to enable printing of dimensions of less than 30 nm, a reliable electron beam lithography system has yet to be provided.
Despite the unavailability of suitable lithographic tools, enhancement in device density and performance in advanced semiconductor devices require continued shrinking of feature sizes including dimensions of metal interconnect structures.